Anav PrasadandJohannes Gäßler
88458164c7
* flash attention support for head dimension 512 added * FA D=512 - match 576 configs, limit ncols2, revert vec cap * fix HIP tile kernel build for D=512 * fix HIP tile kernel occupancy for D=512 on AMD * Apply suggestions from code review Co-authored-by: Johannes Gäßler <johannesg@5d6.de> * fix tile FA compilation --------- Co-authored-by: Johannes Gäßler <johannesg@5d6.de>
54 lines
1.8 KiB
Plaintext
54 lines
1.8 KiB
Plaintext
#include "common.cuh"
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#include "fattn-tile.cuh"
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#include "fattn-wmma-f16.cuh"
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void ggml_cuda_flash_attn_ext_tile(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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const ggml_tensor * K = dst->src[1];
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const ggml_tensor * V = dst->src[2];
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switch (K->ne[0]) {
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case 40: {
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GGML_ASSERT(V->ne[0] == K->ne[0]);
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ggml_cuda_flash_attn_ext_tile_case< 40, 40>(ctx, dst);
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} break;
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case 64: {
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GGML_ASSERT(V->ne[0] == K->ne[0]);
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ggml_cuda_flash_attn_ext_tile_case< 64, 64>(ctx, dst);
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} break;
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case 72: {
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GGML_ASSERT(V->ne[0] == K->ne[0]);
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ggml_cuda_flash_attn_ext_tile_case< 72, 72>(ctx, dst);
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} break;
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case 80: {
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GGML_ASSERT(V->ne[0] == K->ne[0]);
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ggml_cuda_flash_attn_ext_tile_case< 80, 80>(ctx, dst);
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} break;
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case 96: {
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GGML_ASSERT(V->ne[0] == K->ne[0]);
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ggml_cuda_flash_attn_ext_tile_case< 96, 96>(ctx, dst);
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} break;
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case 112: {
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GGML_ASSERT(V->ne[0] == K->ne[0]);
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ggml_cuda_flash_attn_ext_tile_case<112, 112>(ctx, dst);
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} break;
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case 128: {
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GGML_ASSERT(V->ne[0] == K->ne[0]);
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ggml_cuda_flash_attn_ext_tile_case<128, 128>(ctx, dst);
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} break;
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case 256: {
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GGML_ASSERT(V->ne[0] == K->ne[0]);
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ggml_cuda_flash_attn_ext_tile_case<256, 256>(ctx, dst);
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} break;
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case 512: {
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GGML_ASSERT(V->ne[0] == K->ne[0]);
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ggml_cuda_flash_attn_ext_tile_case<512, 512>(ctx, dst);
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} break;
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case 576: {
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GGML_ASSERT(V->ne[0] == 512);
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ggml_cuda_flash_attn_ext_tile_case<576, 512>(ctx, dst);
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} break;
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default: {
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GGML_ABORT("Unsupported head size");
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} break;
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}
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}
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