ggml-cuda: native bf16 flash attention for vec kernel (#20525)
* ggml-cuda: native bf16 flash attention for vec and tile kernels mma kernel still converts bf16 to fp16 before launch, native mma bf16 todo * ggml-cuda: address code owner review feedback reverted tile kernel changes to avoid larger refactor * fix ci failures on turing and hip * fix bf16 vec kernel compile on hip v_dot2 platforms * add comments --------- Co-authored-by: Johannes Gäßler <johannesg@5d6.de>
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co-authored by
Johannes Gäßler
parent
ccb87fa3ee
commit
db9d8aa428
@@ -75,17 +75,17 @@ static __global__ void flash_attn_ext_vec(
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#endif // GGML_USE_HIP
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constexpr int nthreads = ggml_cuda_fattn_vec_get_nthreads_device();
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constexpr int nthreads_KQ = type_K == GGML_TYPE_F16 ? 128 / cpy_nb : nthreads_KQ_q;
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constexpr int nthreads_V = type_V == GGML_TYPE_F16 ? 128 / cpy_nb : nthreads_V_q;
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constexpr int nthreads_KQ = (type_K == GGML_TYPE_F16 || type_K == GGML_TYPE_BF16) ? 128 / cpy_nb : nthreads_KQ_q;
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constexpr int nthreads_V = (type_V == GGML_TYPE_F16 || type_V == GGML_TYPE_BF16) ? 128 / cpy_nb : nthreads_V_q;
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static_assert(WARP_SIZE % nthreads_KQ == 0, "bad nthreads_K");
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static_assert(WARP_SIZE % nthreads_V == 0, "bad nthreads_V");
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constexpr int V_rows_per_thread = type_V == GGML_TYPE_F16 ? 2*cpy_ne : 4;
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constexpr int V_rows_per_thread = (type_V == GGML_TYPE_F16 || type_V == GGML_TYPE_BF16) ? 2*cpy_ne : 4;
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constexpr int V_cols_per_iter = WARP_SIZE / nthreads_V;
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constexpr vec_dot_KQ_t vec_dot_KQ = get_vec_dot_KQ<type_K, D, nthreads_KQ>();
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constexpr bool Q_q8_1 = type_K != GGML_TYPE_F16;
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constexpr bool Q_q8_1 = type_K != GGML_TYPE_F16 && type_K != GGML_TYPE_BF16;
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#ifdef V_DOT2_F32_F16_AVAILABLE
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constexpr dequantize_V_t dequantize_V = get_dequantize_V<type_V, half, V_rows_per_thread>();
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#else
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@@ -323,8 +323,18 @@ static __global__ void flash_attn_ext_vec(
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#pragma unroll
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for (int i_VKQ_0 = 0; i_VKQ_0 < D/2; i_VKQ_0 += nthreads_V*V_rows_per_thread/2) {
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half2 tmp[V_rows_per_thread/2];
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dequantize_V(V + k*nb21, tmp,
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2*i_VKQ_0 + (nthreads_V == WARP_SIZE ? threadIdx.x : threadIdx.x % nthreads_V)*V_rows_per_thread);
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if constexpr (type_V == GGML_TYPE_BF16) {
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float2 tmp_f[V_rows_per_thread/2];
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dequantize_V(V + k*nb21, tmp_f,
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2*i_VKQ_0 + (nthreads_V == WARP_SIZE ? threadIdx.x : threadIdx.x % nthreads_V)*V_rows_per_thread);
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#pragma unroll
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for (int i_VKQ_1 = 0; i_VKQ_1 < V_rows_per_thread/2; ++i_VKQ_1) {
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tmp[i_VKQ_1] = __float22half2_rn(tmp_f[i_VKQ_1]);
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}
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} else {
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dequantize_V(V + k*nb21, tmp,
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2*i_VKQ_0 + (nthreads_V == WARP_SIZE ? threadIdx.x : threadIdx.x % nthreads_V)*V_rows_per_thread);
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}
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#pragma unroll
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for (int i_VKQ_1 = 0; i_VKQ_1 < V_rows_per_thread/2; ++i_VKQ_1) {
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#pragma unroll
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@@ -563,6 +573,7 @@ void ggml_cuda_flash_attn_ext_vec_case(ggml_backend_cuda_context & ctx, ggml_ten
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extern DECL_FATTN_VEC_CASE(D, type_K, GGML_TYPE_Q5_0); \
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extern DECL_FATTN_VEC_CASE(D, type_K, GGML_TYPE_Q5_1); \
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extern DECL_FATTN_VEC_CASE(D, type_K, GGML_TYPE_Q8_0); \
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extern DECL_FATTN_VEC_CASE(D, type_K, GGML_TYPE_BF16); \
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EXTERN_DECL_FATTN_VEC_CASES( 64, GGML_TYPE_F16)
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EXTERN_DECL_FATTN_VEC_CASES( 64, GGML_TYPE_Q4_0)
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@@ -570,6 +581,7 @@ EXTERN_DECL_FATTN_VEC_CASES( 64, GGML_TYPE_Q4_1)
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EXTERN_DECL_FATTN_VEC_CASES( 64, GGML_TYPE_Q5_0)
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EXTERN_DECL_FATTN_VEC_CASES( 64, GGML_TYPE_Q5_1)
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EXTERN_DECL_FATTN_VEC_CASES( 64, GGML_TYPE_Q8_0)
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EXTERN_DECL_FATTN_VEC_CASES( 64, GGML_TYPE_BF16)
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EXTERN_DECL_FATTN_VEC_CASES(128, GGML_TYPE_F16)
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EXTERN_DECL_FATTN_VEC_CASES(128, GGML_TYPE_Q4_0)
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@@ -577,6 +589,7 @@ EXTERN_DECL_FATTN_VEC_CASES(128, GGML_TYPE_Q4_1)
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EXTERN_DECL_FATTN_VEC_CASES(128, GGML_TYPE_Q5_0)
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EXTERN_DECL_FATTN_VEC_CASES(128, GGML_TYPE_Q5_1)
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EXTERN_DECL_FATTN_VEC_CASES(128, GGML_TYPE_Q8_0)
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EXTERN_DECL_FATTN_VEC_CASES(128, GGML_TYPE_BF16)
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EXTERN_DECL_FATTN_VEC_CASES(256, GGML_TYPE_F16)
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EXTERN_DECL_FATTN_VEC_CASES(256, GGML_TYPE_Q4_0)
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@@ -584,3 +597,4 @@ EXTERN_DECL_FATTN_VEC_CASES(256, GGML_TYPE_Q4_1)
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EXTERN_DECL_FATTN_VEC_CASES(256, GGML_TYPE_Q5_0)
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EXTERN_DECL_FATTN_VEC_CASES(256, GGML_TYPE_Q5_1)
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EXTERN_DECL_FATTN_VEC_CASES(256, GGML_TYPE_Q8_0)
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EXTERN_DECL_FATTN_VEC_CASES(256, GGML_TYPE_BF16)
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