ggml : add some lsx support (#23798)
* loongarch : optimize LSX fp16 load/store with native intrinsics Use __lsx_vfcvtl_s_h and __lsx_vfcvt_h_s instead of scalar loops in __lsx_f16x4_load and __lsx_f16x4_store. * loongarch : add LSX implementation for q8_0 dot product * loongarch : add LSX implementation for q6_K dot product * loongarch : add LSX implementation for iq4_xs dot product * Improve reduce ops when sun int16 pairs to int32
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@@ -1125,25 +1125,12 @@ static inline void __lasx_f32cx8_store(ggml_fp16_t * x, __m256 y) {
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#define GGML_F16_EPR 4
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static inline __m128 __lsx_f16x4_load(const ggml_fp16_t * x) {
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float tmp[4];
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tmp[0] = GGML_CPU_FP16_TO_FP32(x[0]);
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tmp[1] = GGML_CPU_FP16_TO_FP32(x[1]);
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tmp[2] = GGML_CPU_FP16_TO_FP32(x[2]);
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tmp[3] = GGML_CPU_FP16_TO_FP32(x[3]);
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return (__m128)__lsx_vld(tmp, 0);
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return __lsx_vfcvtl_s_h(__lsx_vld((const void *)x, 0));
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}
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static inline void __lsx_f16x4_store(ggml_fp16_t * x, __m128 y) {
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float arr[4];
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__lsx_vst(y, arr, 0);
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x[0] = GGML_CPU_FP32_TO_FP16(arr[0]);
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x[1] = GGML_CPU_FP32_TO_FP16(arr[1]);
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x[2] = GGML_CPU_FP32_TO_FP16(arr[2]);
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x[3] = GGML_CPU_FP32_TO_FP16(arr[3]);
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__m128i a = __lsx_vfcvt_h_s(y, y);
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memcpy(x, &a, sizeof(ggml_fp16_t) * 4);
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}
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#define GGML_F32Cx4 __m128
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