metal: per-op source split + parallel compile (#26561)
* metal : per-op source split + parallel compile (#24021) * preliminary extract common header * op source split * split metallib into 8 libs && load in parallel * derive kernel->library routing from functionNames * x-macro lib list + underscore filenames, dedup QK_NL, MRC fixes * op source split 8 to 20 * improve robustness of source fallback * clean up * change bool -> atomic_bool * only prepend headers that source actually includes * no semaphore, use GCD global queue * dedup library compile path, fix NSError lifetime, rename gla * relocate upstream concat/rope_back/repeat kernel changes into split files * move ggml-common.h from common.h into dequantize.h to shrink binary size --------- Co-authored-by: lvyichen <lvyichen@stepfun.com> * metal: add col2im_1d op (f32/f16/bf16) (#25176) * metal : add set_rows with src0 f16 (#25434) * metal : add CONV_2D_DW (depthwise convolution) support (#21565) * metal : add Q2_0 support (#25419) * metal: fuse snake activation (mul, sin, sqr, mul, add) (#25459) * ggml-metal: FWHT kernel for metal backend (#25924) * metal : port new kernels into the split sources Move the kernels added on master after the split (lightning indexer, DSv4 hyper-connections, silu_back, f16 bin ops, TQ2_0, the flash-attn KV dequantization pass, rope offset/inplace, ssm_scan rollback, packed q8_0 dequantization and the tensor-API mat-mat K clamp) into the corresponding kernels/*.metal sources. Copied verbatim, no functional change. --------- Co-authored-by: lvyichen <lvyichen@stepfun.com> Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>
This commit is contained in:
YiChen Lv
co-authored by
lvyichen
Georgi Gerganov
lvyichen
Georgi Gerganov
parent
b3c3b96a13
commit
b615f5b4bd
@@ -0,0 +1,308 @@
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#include "common.h"
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// F == 1 : norm (no fuse)
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// F == 2 : norm + mul
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// F == 3 : norm + mul + add
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template <typename T, short F>
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kernel void kernel_norm_fuse_impl(
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constant ggml_metal_kargs_norm & args,
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device const char * src0,
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device const char * src1_0,
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device const char * src1_1,
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device char * dst,
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threadgroup float * shmem_f32 [[threadgroup(0)]],
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uint3 tgpig[[threadgroup_position_in_grid]],
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ushort3 tpitg[[thread_position_in_threadgroup]],
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ushort sgitg[[simdgroup_index_in_threadgroup]],
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ushort tiisg[[thread_index_in_simdgroup]],
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ushort3 ntg[[threads_per_threadgroup]]) {
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if (sgitg == 0) {
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shmem_f32[tiisg] = 0.0f;
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}
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const int i01 = tgpig.x;
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const int i02 = tgpig.y;
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const int i03 = tgpig.z;
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device const T * x = (device const T *) (src0 + i03*args.nbf3[0] + i02*args.nbf2[0] + i01*args.nbf1[0]);
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device const T * f0 = (device const T *) (src1_0 + (i03%args.nef3[1])*args.nbf3[1] + (i02%args.nef2[1])*args.nbf2[1] + (i01%args.nef1[1])*args.nbf1[1]);
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device const T * f1 = (device const T *) (src1_1 + (i03%args.nef3[2])*args.nbf3[2] + (i02%args.nef2[2])*args.nbf2[2] + (i01%args.nef1[2])*args.nbf1[2]);
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T sumft(0.0f);
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float sumf = 0.0f;
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for (int i00 = tpitg.x; i00 < args.ne00_t; i00 += ntg.x) {
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sumft += x[i00];
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}
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sumf = dot(sumft, T(1.0f));
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sumf = simd_sum(sumf);
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (tiisg == 0) {
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shmem_f32[sgitg] = sumf;
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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sumf = shmem_f32[tiisg];
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sumf = simd_sum(sumf);
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const float mean = sumf/args.ne00;
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device T * y = (device T *) (dst + i03*args.nb3 + i02*args.nb2 + i01*args.nb1);
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sumf = 0.0f;
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for (int i00 = tpitg.x; i00 < args.ne00_t; i00 += ntg.x) {
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y[i00] = x[i00] - mean;
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sumf += dot(y[i00], y[i00]);
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}
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sumf = simd_sum(sumf);
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (tiisg == 0) {
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shmem_f32[sgitg] = sumf;
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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sumf = shmem_f32[tiisg];
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sumf = simd_sum(sumf);
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const float variance = sumf/args.ne00;
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const float scale = 1.0f/sqrt(variance + args.eps);
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for (int i00 = tpitg.x; i00 < args.ne00_t; i00 += ntg.x) {
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if (F == 1) {
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y[i00] = (y[i00]*scale);
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}
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if (F == 2) {
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y[i00] = (y[i00]*scale)*f0[i00];
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}
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if (F == 3) {
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y[i00] = (y[i00]*scale)*f0[i00] + f1[i00];
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}
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}
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}
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typedef decltype(kernel_norm_fuse_impl<float4, 1>) kernel_norm_fuse_t;
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template [[host_name("kernel_norm_f32")]] kernel kernel_norm_fuse_t kernel_norm_fuse_impl<float, 1>;
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template [[host_name("kernel_norm_mul_f32")]] kernel kernel_norm_fuse_t kernel_norm_fuse_impl<float, 2>;
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template [[host_name("kernel_norm_mul_add_f32")]] kernel kernel_norm_fuse_t kernel_norm_fuse_impl<float, 3>;
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template [[host_name("kernel_norm_f32_4")]] kernel kernel_norm_fuse_t kernel_norm_fuse_impl<float4, 1>;
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template [[host_name("kernel_norm_mul_f32_4")]] kernel kernel_norm_fuse_t kernel_norm_fuse_impl<float4, 2>;
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template [[host_name("kernel_norm_mul_add_f32_4")]] kernel kernel_norm_fuse_t kernel_norm_fuse_impl<float4, 3>;
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// F == 1 : rms_norm (no fuse)
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// F == 2 : rms_norm + mul
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// F == 3 : rms_norm + mul + add
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template <typename T, short F>
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kernel void kernel_rms_norm_fuse_impl(
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constant ggml_metal_kargs_norm & args,
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device const char * src0,
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device const char * src1_0,
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device const char * src1_1,
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device char * dst,
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threadgroup float * shmem_f32 [[threadgroup(0)]],
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uint3 tgpig[[threadgroup_position_in_grid]],
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ushort3 tpitg[[thread_position_in_threadgroup]],
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ushort sgitg[[simdgroup_index_in_threadgroup]],
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ushort tiisg[[thread_index_in_simdgroup]],
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ushort3 ntg[[threads_per_threadgroup]]) {
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if (sgitg == 0) {
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shmem_f32[tiisg] = 0.0f;
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}
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const int i01 = tgpig.x;
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const int i02 = tgpig.y;
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const int i03 = tgpig.z;
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device const T * x = (device const T *) (src0 + i03*args.nbf3[0] + i02*args.nbf2[0] + i01*args.nbf1[0]);
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device const T * f0 = (device const T *) (src1_0 + (i03%args.nef3[1])*args.nbf3[1] + (i02%args.nef2[1])*args.nbf2[1] + (i01%args.nef1[1])*args.nbf1[1]);
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device const T * f1 = (device const T *) (src1_1 + (i03%args.nef3[2])*args.nbf3[2] + (i02%args.nef2[2])*args.nbf2[2] + (i01%args.nef1[2])*args.nbf1[2]);
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float sumf = 0.0f;
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// parallel sum
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for (int i00 = tpitg.x; i00 < args.ne00_t; i00 += ntg.x) {
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sumf += dot(x[i00], x[i00]);
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}
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sumf = simd_sum(sumf);
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (tiisg == 0) {
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shmem_f32[sgitg] = sumf;
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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sumf = shmem_f32[tiisg];
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sumf = simd_sum(sumf);
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const float mean = sumf/args.ne00;
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const float scale = 1.0f/sqrt(mean + args.eps);
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device T * y = (device T *) (dst + i03*args.nb3 + i02*args.nb2 + i01*args.nb1);
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for (int i00 = tpitg.x; i00 < args.ne00_t; i00 += ntg.x) {
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if (F == 1) {
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y[i00] = (x[i00]*scale);
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}
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if (F == 2) {
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y[i00] = (x[i00]*scale)*f0[i00];
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}
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if (F == 3) {
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y[i00] = (x[i00]*scale)*f0[i00] + f1[i00];
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}
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}
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}
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typedef decltype(kernel_rms_norm_fuse_impl<float4, 1>) kernel_rms_norm_fuse_t;
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template [[host_name("kernel_rms_norm_f32")]] kernel kernel_rms_norm_fuse_t kernel_rms_norm_fuse_impl<float, 1>;
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template [[host_name("kernel_rms_norm_mul_f32")]] kernel kernel_rms_norm_fuse_t kernel_rms_norm_fuse_impl<float, 2>;
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template [[host_name("kernel_rms_norm_mul_add_f32")]] kernel kernel_rms_norm_fuse_t kernel_rms_norm_fuse_impl<float, 3>;
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template [[host_name("kernel_rms_norm_f32_4")]] kernel kernel_rms_norm_fuse_t kernel_rms_norm_fuse_impl<float4, 1>;
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template [[host_name("kernel_rms_norm_mul_f32_4")]] kernel kernel_rms_norm_fuse_t kernel_rms_norm_fuse_impl<float4, 2>;
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template [[host_name("kernel_rms_norm_mul_add_f32_4")]] kernel kernel_rms_norm_fuse_t kernel_rms_norm_fuse_impl<float4, 3>;
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template <typename T0, typename T>
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kernel void kernel_l2_norm_impl(
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constant ggml_metal_kargs_l2_norm & args,
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device const char * src0,
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device char * dst,
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threadgroup float * shmem_f32 [[threadgroup(0)]],
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uint3 tgpig[[threadgroup_position_in_grid]],
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ushort3 tpitg[[thread_position_in_threadgroup]],
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ushort sgitg[[simdgroup_index_in_threadgroup]],
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ushort tiisg[[thread_index_in_simdgroup]],
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ushort3 ntg[[threads_per_threadgroup]]) {
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const int i03 = tgpig.z;
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const int i02 = tgpig.y;
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const int i01 = tgpig.x;
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if (sgitg == 0) {
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shmem_f32[tiisg] = 0.0f;
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}
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device const T0 * x = (device const T0 *) (src0 + i03*args.nb03 + i02*args.nb02 + i01*args.nb01);
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device T * y = (device T *) (dst + i03*args.nb3 + i02*args.nb2 + i01*args.nb1);
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float sumf = 0.0f;
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// parallel sum
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for (int i00 = tpitg.x; i00 < args.ne00; i00 += ntg.x) {
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sumf += dot(x[i00], x[i00]);
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}
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sumf = simd_sum(sumf);
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (tiisg == 0) {
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shmem_f32[sgitg] = sumf;
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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sumf = shmem_f32[tiisg];
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sumf = simd_sum(sumf);
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const float scale = 1.0f/max(sqrt(sumf), args.eps);
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for (int i00 = tpitg.x; i00 < args.ne00; i00 += ntg.x) {
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y[i00] = x[i00] * scale;
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}
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}
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typedef decltype(kernel_l2_norm_impl<float, float>) kernel_l2_norm_t;
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template [[host_name("kernel_l2_norm_f32_f32")]] kernel kernel_l2_norm_t kernel_l2_norm_impl<float, float>;
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template [[host_name("kernel_l2_norm_f32_f32_4")]] kernel kernel_l2_norm_t kernel_l2_norm_impl<float4, float4>;
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kernel void kernel_group_norm_f32(
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constant ggml_metal_kargs_group_norm & args,
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device const float * src0,
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device float * dst,
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threadgroup float * buf [[threadgroup(0)]],
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uint tgpig[[threadgroup_position_in_grid]],
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uint tpitg[[thread_position_in_threadgroup]],
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uint sgitg[[simdgroup_index_in_threadgroup]],
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uint tiisg[[thread_index_in_simdgroup]],
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uint ntg[[threads_per_threadgroup]]) {
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const int64_t ne = args.ne00*args.ne01*args.ne02;
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const int64_t gs = args.ne00*args.ne01*((args.ne02 + args.ngrp - 1) / args.ngrp);
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int start = tgpig * gs;
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int end = start + gs;
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start += tpitg;
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if (end >= ne) {
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end = ne;
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}
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float tmp = 0.0f; // partial sum for thread in warp
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for (int j = start; j < end; j += ntg) {
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tmp += src0[j];
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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tmp = simd_sum(tmp);
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if (ntg > N_SIMDWIDTH) {
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if (sgitg == 0) {
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buf[tiisg] = 0.0f;
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (tiisg == 0) {
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buf[sgitg] = tmp;
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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tmp = buf[tiisg];
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tmp = simd_sum(tmp);
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}
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const float mean = tmp / gs;
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tmp = 0.0f;
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for (int j = start; j < end; j += ntg) {
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float xi = src0[j] - mean;
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dst[j] = xi;
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tmp += xi * xi;
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}
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tmp = simd_sum(tmp);
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if (ntg > N_SIMDWIDTH) {
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if (sgitg == 0) {
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buf[tiisg] = 0.0f;
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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if (tiisg == 0) {
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buf[sgitg] = tmp;
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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tmp = buf[tiisg];
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tmp = simd_sum(tmp);
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}
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const float variance = tmp / gs;
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const float scale = 1.0f/sqrt(variance + args.eps);
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for (int j = start; j < end; j += ntg) {
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dst[j] *= scale;
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}
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}
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