hexagon: MUL_MAT and MUL_MAT_ID rework : 32x32 tiled weight repack, kernel-params, cached graphs (#24954)
* hex-mm: new weight layout and fusion updates * hvx-mm: unroll the new tiled vec_dots to optimize hvx register util * hex-mm: optimize dyn.quant format for q8_0 and q8_1 to reduce overhead in vec_dots. * hvx-mm: parallel quantizer per block for large rows * hvx-mm: simplify and futher optimize dyn.quant and vec_dots * hvx-mm: keep intermediate per tile accumulators in fp16 * hmx-mm: optimize weight dequant by aligning the repacked tiles with the DMA * hmx-mm: remove qweight scratch and just use vtcm_weight * hmx-mm: remove all unused and obsolete code * hmx-mm: the new tiled repack format is here to stay -- rename all x4x2 to _tiled * hmx-mm: improve activation processing with dma prefetch * hex-mm: fix hmx/hvx fallback logic and MUL_MAT_ID allocation (unbreaks OLMoE) * hex-mm: align the weight tiles with dma just like we did in hmx-mm * hex-mm: factor out common mm bits into htp/matmul-ops.h * hex-mm: start moving mm kernel selection to the host * hex-mm: move all of the matmul param compute into the host * hmx-mm: restore pipelined mode * hmx-mm: unroll the dequant functions to optimize register usage * hmx-mm: further improve activation process * hex-mm: use vtcm_seq_alloc for all vtcm allocations and define more common functions * hex-mm: improve mm optimizer to acount for number of activation threads * hex-mm: fix matmul-id kernel params selection (unbreaks OLMoE and LFM) * hexagon: remove support for arch < v73 since HMX is now required for most use-cases * hex-mm: cleanup naming for consistency * hex-mm: make sure matmul fusion accounts for vtcm allocation * hex-mm: minor cleanup for kernel_params definition * hex-mm: replace hardcoded limits with proper checks for vtcm requirements * hex-mm: add support for non-tiled mm as a fallback option and factor out hvx kernels into separate header * hex-mm: remove unused functions * hex-mm: add shorthand for MM_SELECT in run-tool script * hvx-mm: factor out hvx/hmx microkernels and unify matmul entry and dispatch * hex-mm: further cleanup matmul fallback path * hex-mm: refactor matmul entry point and dispatch a bit further * hexagon: update cmake build to enable hmx for everything * hex-ops: optimize kernel_param updates and include summary in the logs * hex-mm: add support for GGML_HEXAGON_MM_SELECT * hex-mm: add hex-common header * hex-mm: pass correct number of tasks to workpool * hex-mm: add proper checks for no-work in dyn.quant tasks * hex-mm: convert all quantizers into a macro * hex-mm: fix hvx-flat fallback to pass all MUL_MAT tests * hex-mm: vectorize q8_1 quantizer * hex-mm: improve fused ffn mm stride handling * hex-mm: consistent use of n_threads and pipeline in kernel_params * hexagon: minor formatting * hex-mm: update MUL_MAT_ID kernel_param handling to make sure host/npu are in sync * hvx-mm: go back to accumulating in fp32 in tiled hvx kernels, more accurate and same perf * hvx-mm: unroll the loops and remove masking that is not needed for tiled accums * hmx-mm: optimize activation processing (slit loops, some unrolling, etc) * hmx-mm: minor optimization for output processing * hex-mm: consistent use of uint32_t and size_t in mm kernels * hex-mm: remove legacy restrictions for rows to be multiple of 256 * hexagon: replace sprintf with snprintf * hex-mm: relax hardcoded nrows checks and rely on VTCM size requirements * hexagon: minor alignment fix * hexagon: fix trailing spaces * hex-mm: relax padding from 256 to 128 (leftovers) * hex-mm: remove redundant checks for weight align to 128 we always use 2D dma for the weights and align them properly * hmx-mm: MUL_MAT_ID better work distribution between hvx threads and hmx tracing * hex-mm: specialize per-token mmid activation handling * hex-profile: update python scripts to handle kernel-params section in the logging output * hex-mm: move n_prefetch (aka dma_depth) into kernel params and remove unused fields * hex-trace: use easier to parse format, simply and fix post-proc scripts * hmx-mm: relax 32 row limit for output processing which helps utilization * hmx-mm: use start-chunk idx for tracing info * hmx-mm: parameterize activation dma pipeline * hexagon: add support for simple graph caching to avoid recomputing kernel-params * hex-mm: remove left-over repack functions * hex-mm: tighten n_prefetch asserts * hex-mm: remove duplicate round/align_up helper * hexagon: cleanup common header used in host/npu * hexagon: update early wakeup threshold * hmx-mm: define cost constants and update solver to assume that repacked ne[1] is padded to 32 * hmx-mm: make precompute_matmul a bit more readable (split into smaller functions, etc) * hex-mm: remove n_threads constraint * hex-mm: minor formatting updates * hex-mm: remove obsolete profiling logs * hex-mm: restore hardcode gate to refuse lm-head to avoid repacking that tensor
This commit is contained in:
@@ -361,7 +361,7 @@ static void vtcm_free(struct htp_context * ctx) {
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static void htp_packet_callback(dspqueue_t queue, int error, void * context);
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static void htp_error_callback(dspqueue_t queue, int error, void * context);
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AEEResult htp_iface_start(remote_handle64 handle, uint32 sess_id, uint64 dsp_queue_id, uint32 n_hvx, uint32 use_hmx, uint64_t max_vmem) {
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AEEResult htp_iface_start(remote_handle64 handle, uint32_t sess_id, uint64_t dsp_queue_id, uint32_t n_hvx, uint32_t n_hmx, uint64_t max_vmem) {
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struct htp_context * ctx = (struct htp_context *) handle;
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if (!ctx) {
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@@ -395,10 +395,9 @@ AEEResult htp_iface_start(remote_handle64 handle, uint32 sess_id, uint64 dsp_que
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return AEE_ENOMEMORY;
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}
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#ifdef HTP_HAS_HMX
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ctx->hmx_enabled = use_hmx;
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ctx->hmx_enabled = n_hmx;
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ctx->hmx_queue = NULL;
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if (use_hmx) {
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if (n_hmx) {
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ctx->hmx_queue = hmx_queue_create(16, ctx->vtcm_rctx);
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if (ctx->hmx_queue) {
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ctx->hmx_queue->trace = &ctx->trace[HTP_MAX_NTHREADS];
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@@ -407,8 +406,7 @@ AEEResult htp_iface_start(remote_handle64 handle, uint32 sess_id, uint64 dsp_que
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ctx->hmx_enabled = false;
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}
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}
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FARF(HIGH, "HMX %s (use_hmx=%d)", ctx->hmx_enabled ? "enabled" : "disabled", use_hmx);
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#endif
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FARF(HIGH, "HMX %s (n_hmx=%d)", ctx->hmx_enabled ? "enabled" : "disabled", n_hmx);
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qurt_sysenv_max_hthreads_t hw_threads;
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qurt_sysenv_get_max_hw_threads(&hw_threads);
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@@ -481,13 +479,11 @@ AEEResult htp_iface_stop(remote_handle64 handle) {
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dma_queue_delete(ctx->dma[i]);
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}
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#ifdef HTP_HAS_HMX
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if (ctx->hmx_queue) {
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hmx_queue_delete(ctx->hmx_queue);
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ctx->hmx_queue = NULL;
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}
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ctx->hmx_enabled = false;
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#endif
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vtcm_free(ctx);
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@@ -500,6 +496,36 @@ AEEResult htp_iface_stop(remote_handle64 handle) {
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return AEE_SUCCESS;
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}
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AEEResult htp_iface_hwinfo(remote_handle64 handle, uint32_t * n_threads, uint32_t * n_hvx, uint32_t * n_hmx, uint64_t * vtcm_size) {
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(void)handle;
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if (!n_threads || !n_hvx || !n_hmx || !vtcm_size) {
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return AEE_EBADPARM;
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}
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qurt_sysenv_max_hthreads_t hw_threads;
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qurt_sysenv_get_max_hw_threads(&hw_threads);
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uint32_t hw_nhvx = (qurt_hvx_get_units() >> 8) & 0xFF;
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uint32_t n_hvx_val = hw_nhvx;
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if (n_hvx_val > hw_threads.max_hthreads) {
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n_hvx_val = hw_threads.max_hthreads;
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}
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if (n_hvx_val > HTP_MAX_NTHREADS) {
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n_hvx_val = HTP_MAX_NTHREADS;
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}
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// for now we force n_threads == n_hvx
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*n_threads = n_hvx_val;
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*n_hvx = n_hvx_val;
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*n_hmx = 1;
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uint32_t vtcm_sz = 8 * 1024 * 1024; // 8MB default fallback
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HAP_compute_res_query_VTCM(0, (unsigned int *)&vtcm_sz, NULL, NULL, NULL);
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*vtcm_size = vtcm_sz;
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return AEE_SUCCESS;
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}
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static void htp_error_callback(dspqueue_t queue, int error, void * context) {
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// No errors expected on the DSP.
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FARF(ERROR, "Error callback: 0x%08x", (unsigned) error);
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@@ -554,6 +580,12 @@ static int execute_op(struct htp_ops_context * octx) {
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case HTP_OP_MUL_MAT_ID:
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return op_matmul_id(octx);
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case HTP_OP_MUL_MAT_QKV:
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return op_matmul_qkv(octx);
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case HTP_OP_MUL_MAT_FFN:
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return op_matmul_ffn(octx);
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case HTP_OP_MUL:
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case HTP_OP_ADD:
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case HTP_OP_SUB:
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@@ -762,8 +794,9 @@ static void prep_tensors(struct htp_context *ctx, struct htp_buf_desc *bufs, str
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}
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}
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static void proc_op_req(struct htp_ops_context * octx, struct htp_tensor *tens, uint32_t idx, struct htp_op_desc * op) {
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static int proc_op_req(struct htp_ops_context * octx, struct htp_tensor *tens, uint32_t idx, struct htp_op_desc * op) {
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memcpy(octx->op_params, op->params, sizeof(octx->op_params));
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memcpy(octx->kernel_params, op->kernel_params, sizeof(octx->kernel_params));
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octx->flags = op->flags;
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octx->op = op->opcode;
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@@ -785,22 +818,41 @@ static void proc_op_req(struct htp_ops_context * octx, struct htp_tensor *tens,
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src->ne[0], src->ne[1], src->ne[3], src->ne[3]);
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}
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// Prep output tensor
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struct htp_tensor *dst = tens + op->dst;
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// Prep output tensors
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for (uint32_t i = 0; i < HTP_OP_MAX_OUTPUTS; i++) {
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uint16_t dst_idx = op->dst[i];
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if (dst_idx == 0xffff) {
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octx->dsts[i] = NULL;
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continue;
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}
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struct htp_tensor *dst = tens + dst_idx;
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octx->dsts[i] = dst;
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octx->dst = dst;
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FARF(HIGH, "prep-dst[%u] #%u: data %p size %u : %u:%u:%u:%u", i, dst_idx, (void*) dst->data, dst->size,
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dst->ne[0], dst->ne[1], dst->ne[2], dst->ne[3]);
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}
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FARF(HIGH, "prep-dst #%u: data %p size %u : %u:%u:%u:%u", op->dst, (void*) dst->data, dst->size,
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dst->ne[0], dst->ne[1], dst->ne[3], dst->ne[3]);
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int status = execute_op(octx);
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(void) execute_op(octx);
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octx->src0_spad.src = NULL;
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octx->src1_spad.src = NULL;
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octx->src2_spad.src = NULL;
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octx->src3_spad.src = NULL;
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octx->dst_spad.src = NULL;
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// flush buffers on output
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hex_l2flush((void *) dst->data, dst->size);
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dst->flags |= HTP_TENSOR_FLUSHED;
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for (uint32_t i = 0; i < HTP_OP_MAX_OUTPUTS; i++) {
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if (octx->dsts[i]) {
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struct htp_tensor *dst = (struct htp_tensor *)octx->dsts[i];
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hex_l2flush((void *) dst->data, dst->size);
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dst->flags |= HTP_TENSOR_FLUSHED;
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FARF(HIGH, "post-dst #%u: data %p size %u : %u:%u:%u:%u", op->dst, (void*) dst->data, dst->size,
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dst->ne[0], dst->ne[1], dst->ne[3], dst->ne[3]);
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FARF(HIGH, "post-dst[%u] #%u: data %p size %u : %u:%u:%u:%u", i, op->dst[i], (void*) dst->data, dst->size,
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dst->ne[0], dst->ne[1], dst->ne[2], dst->ne[3]);
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}
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}
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return status;
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}
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#define DSPQUEUE_POLL_TIMEOUT_USEC 100
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@@ -892,20 +944,26 @@ static void htp_packet_callback(dspqueue_t queue, int error, void * context) {
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}
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}
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int op_status = HTP_STATUS_OK;
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uint32_t op_wakeup = n_ops / 2; // half-way throgh the batch
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for (uint32_t i=0; i < n_ops; i++) {
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struct profile_data prof;
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if (i == (n_ops-1)) {
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// wake up the host before starting the last op
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if (i == op_wakeup) {
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dspqueue_write_early_wakeup_noblock(queue, 0, 0);
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}
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profile_start(ctx->profiler, &prof);
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proc_op_req(octx, tens, i, &ops[i]);
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op_status = proc_op_req(octx, tens, i, &ops[i]);
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profile_stop(ctx->profiler, &prof);
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if (op_status != HTP_STATUS_OK) {
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break;
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}
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if (ctx->profiler) {
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pds[i].opcode = ops[i].opcode;
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pds[i].usecs = prof.usecs;
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@@ -919,7 +977,7 @@ static void htp_packet_callback(dspqueue_t queue, int error, void * context) {
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struct htp_opbatch_rsp rsp;
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rsp.id = req.id;
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rsp.status = HTP_STATUS_OK;
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rsp.status = op_status;
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rsp.n_bufs = n_bufs;
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rsp.n_tensors = n_tens;
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rsp.n_ops = n_ops;
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