hexagon: Add ARGSORT, DIV, SQR, SQRT, SUM_ROWS, GEGLU (#19406)
* hexagon: add ARGSORT op Co-authored-by: Yarden Tal <yardent@qti.qualcomm.com> * hexagon: argsort reject tensors with huge rows for now * Adding support for DIV,SQR,SQRT,SUM_ROWS ops in hexagon backend * hexagon : Add GEGLU op * hexagon: fix editor config check * hexagon: rewrite and optimize binary ops ADD/SUB/MUL/DIV/ADD_ID to use DMA --------- Co-authored-by: Yarden Tal <yardent@qti.qualcomm.com> Co-authored-by: Manohara Hosakoppa Krishnamurthy <mhosakop@qti.qualcomm.com>
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co-authored by
Yarden Tal
Manohara Hosakoppa Krishnamurthy
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8ee538ce73
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73cd5e1b97
@@ -136,8 +136,6 @@ static inline void hvx_copy_f32_uu(uint8_t * restrict dst, const uint8_t * restr
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dst_type * restrict vdst = (dst_type *) dst; \
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src_type * restrict vsrc = (src_type *) src; \
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\
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const HVX_Vector zero = Q6_V_vsplat_R(0); \
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\
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const uint32_t elem_size = sizeof(__fp16); \
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const uint32_t epv = 128 / elem_size; \
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const uint32_t nvec = n / epv; \
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