CUDA: no FP16 arithmetic for vector FA kernel (#17558)
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@@ -558,8 +558,12 @@ static __device__ __forceinline__ void ggml_cuda_mad(float & acc, const float2 v
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acc += v.y*u.y;
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}
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static __device__ __forceinline__ void ggml_cuda_mad(float & acc, const half2 v, const half2 u) {
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#if defined(GGML_USE_HIP) && (defined(RDNA2) || defined(RDNA3) || defined(RDNA4) || defined(__gfx906__) || defined(CDNA))
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#define V_DOT2_F32_F16_AVAILABLE
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#endif // defined(GGML_USE_HIP) && (defined(RDNA2) || defined(RDNA3) || defined(RDNA4) || defined(__gfx906__) || defined(CDNA))
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static __device__ __forceinline__ void ggml_cuda_mad(float & acc, const half2 v, const half2 u) {
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#ifdef V_DOT2_F32_F16_AVAILABLE
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asm volatile("v_dot2_f32_f16 %0, %1, %2, %0" : "+v"(acc) : "v"(v), "v"(u));
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#else
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#ifdef FAST_FP16_AVAILABLE
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@@ -571,7 +575,7 @@ static __device__ __forceinline__ void ggml_cuda_mad(float & acc, const half2 v,
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acc += tmpv.x * tmpu.x;
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acc += tmpv.y * tmpu.y;
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#endif // FAST_FP16_AVAILABLE
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#endif // defined(GGML_USE_HIP) && (defined(RDNA2) || defined(RDNA3) || defined(RDNA4) || defined(GCN5) || defined(CDNA))
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#endif // V_DOT2_F32_F16_AVAILABLE
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}
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static __device__ __forceinline__ void ggml_cuda_mad(half2 & acc, const half2 v, const half2 u) {
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