hexagon: add support for basic and extended Op profiling (#22269)
* hexagon: restore HTP_OPMASK_QUEUE * hexagon: honor OPMASK_SKIP_COMPUTE in hmx-matmul * hex-prof: restore op profiling * hex-prof: enable PMU * hexagon: simplify and improve op-queuing with full profiling support Add separate profile descriptors. * hexagon: remove opsync and rename opmask into opstage opsync is no longer needed since the profiler is fully async now. opmask name was confusing and opstage is more accurate. * hexagon: refactor opbatch queue handling * hexagon: add iface hooks for enabling profiler from the host Also move all the PMU setup stuff out of the hex-utils since it's not inteded for normal use. * hexagon: make profiler mode configurable On older devices getting PMU counters is expensive so it's now optional. * hexagon: add support for setting profiler pmu events from env * hexagon: simplify profiler output (no need to print buffs, etc) * hexagon: simplify pmu counter formating * hexagon: add a simple profile post-proc tool * hex-prof: add support for reading logs from stdin * hexagon: document GGML_HEXAGON_PROFILE * hex-prof: update default width for dims field * hex-prof: fix linter warnings and errors * Update ggml/src/ggml-hexagon/htp/htp-ops.h Co-authored-by: Sigbjørn Skjæret <sigbjorn.skjaeret@scala.com> * Update scripts/snapdragon/ggml-hexagon-profile.py Co-authored-by: Sigbjørn Skjæret <sigbjorn.skjaeret@scala.com> --------- Co-authored-by: Trivikram Reddy <tamarnat@qti.qualcomm.com> Co-authored-by: Sigbjørn Skjæret <sigbjorn.skjaeret@scala.com>
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co-authored by
Sigbjørn Skjæret
Trivikram Reddy
parent
187a456370
commit
5d2b52d80d
@@ -42,9 +42,9 @@ enum htp_data_type {
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// Mask to enable various stages of the Ops.
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// Used for debugging and profiling.
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enum htp_op_mask {
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HTP_OPMASK_QUEUE = (1 << 0), // Enable Queueing (ie calls into the DSP)
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HTP_OPMASK_COMPUTE = (1 << 1), // Enable Compute
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enum htp_op_stage {
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HTP_OPSTAGE_QUEUE = (1 << 0), // Enable Queueing (ie calls into NPU)
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HTP_OPSTAGE_COMPUTE = (1 << 1), // Enable Compute
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};
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// Do not reorder first 4 (used as an index)
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@@ -137,27 +137,45 @@ struct htp_op_desc {
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int32_t params[HTP_OP_MAX_PARAMS]; // Params for the op, e.g. epsilon of RMS norm
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uint16_t src[HTP_OP_MAX_INPUTS]; // Input tensors indices
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uint16_t dst; // Output tensor index
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};
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// the rest is filled in-place by the NPU
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uint32_t prof_usecs; // Number of usec per request
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uint32_t prof_cycles; // Number of cycles per request
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uint32_t prof_pkts; // Number of instruction packets per request
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uint32_t unused;
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enum htp_profiler_mode {
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HTP_PROF_DISABLED = 0,
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HTP_PROF_BASIC = 1,
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HTP_PROF_PMU = 2,
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};
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#define HTP_PROF_PMU_NCNT 8
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// Profile descriptor
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struct htp_prof_desc {
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uint32_t opcode; // GGML/HTP Op
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uint32_t usecs; // Number of usec
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uint32_t cycles; // Number of cycles
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uint32_t pad; // Unused
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uint32_t pmu[HTP_PROF_PMU_NCNT]; // PMU counters
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};
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struct htp_opbatch_req {
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uint32_t id; // Batch id
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uint32_t n_bufs; // Number of buffers
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uint32_t n_tensors; // Number of tensors
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uint32_t n_ops; // Number of ops
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uint32_t flags; // unused
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uint32_t pad; // unused
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// struct htp_buf_desc bufs[]; -- dspqueue buf 0
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// struct htp_tensor tensors[]; -- dspqueue buf 0
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// struct htp_op_desc ops[]; -- dspqueue buf 0
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};
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struct htp_opbatch_rsp {
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uint32_t id; // Batch id
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uint32_t status; // HTP_STATUS_...
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// struct htp_op_req ops[]; -- dspqueue buf 0
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uint32_t n_bufs; // Number of buffers
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uint32_t n_tensors; // Number of tensors
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uint32_t n_ops; // Number of op profile descriptors
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uint32_t pad; // unused
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// struct htp_prof_desc profs[]; -- dspqueue buf 0
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};
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#endif /* HTP_OPS_H */
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