ggml-cuda: Add NVFP4 dp4a kernel (#20644)
Added check for dst_t to cuda_cast template for float Restored ggml_cuda_ue4m3_to_fp32, changed vecdot ints to int32ts Added CUDART/HIP Check and HIP/fp8 include Added NVFP4 to Test-backend-ops Added hip_fp8_e4m3 to __nv_fp8_e4m3 typedef --------- Co-authored-by: Johannes Gäßler <johannesg@5d6.de>
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co-authored by
Johannes Gäßler
parent
0fac87b157
commit
112c78159f
@@ -1297,7 +1297,12 @@ static void ggml_cuda_op_mul_mat_cublas(
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const bool supports_bf16 = GGML_CUDA_CC_IS_NVIDIA(cc) || GGML_CUDA_CC_IS_AMD(cc) ||
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(GGML_CUDA_CC_IS_MTHREADS(cc) && cc >= GGML_CUDA_CC_QY2);
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const bool use_fp16 = (src0->type == GGML_TYPE_F16 || ggml_is_quantized(src0->type)) && ggml_is_contiguous(src0) && row_diff == src0->ne[1] && dst->op_params[0] == GGML_PREC_DEFAULT;
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const bool use_fp16 =
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src0->type != GGML_TYPE_NVFP4 &&
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(src0->type == GGML_TYPE_F16 || ggml_is_quantized(src0->type)) &&
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ggml_is_contiguous(src0) &&
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row_diff == src0->ne[1] &&
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dst->op_params[0] == GGML_PREC_DEFAULT;
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if (supports_bf16 && src0->type == GGML_TYPE_BF16 && ggml_is_contiguous(src0) && row_diff == src0->ne[1]) {
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ggml_cuda_pool_alloc<nv_bfloat16> src1_as_bf16(ctx.pool(id));
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@@ -4781,6 +4786,9 @@ static bool ggml_backend_cuda_device_supports_op(ggml_backend_dev_t dev, const g
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case GGML_TYPE_Q5_1:
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case GGML_TYPE_Q8_0:
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case GGML_TYPE_MXFP4:
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#ifdef FP8_AVAILABLE
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case GGML_TYPE_NVFP4:
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#endif // FP8_AVAILABLE
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case GGML_TYPE_Q2_K:
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case GGML_TYPE_Q3_K:
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case GGML_TYPE_Q4_K:
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